Digital camera

ABSTRACT

A digital camera includes a CCD imager. If brightness of an object is not enough, a frame rate of the CCD imager at a time of a focus adjustment is changed from 30 fps to 15 fps. This also lowers a reading speed of a camera signal, and reduces noise included in the camera signal. An AF evaluation value is acquired by integrating a high frequency component of a Y signal generated on the basis of the camera signal, and therefore, high noise causes an error in the AF evaluation value and fails to correctly adjust focus. This is the reason why the driving speed of the CCD imager is lowered when the brightness of the object is not enough.

TECHNICAL FIELD

The present invention relates to a digital camera reading an imagesignal generated by a photoelectronic conversion in the image sensortherefrom.

More specifically, the present invention relates to a digital cameraadjusting focus on the basis of a high frequency component of an imagesignal corresponding to an object image photographed by an image sensor.

PRIOR ART

In a digital camera, an object is exposed to an image sensor such as aCCD imager, and an image signal generated by a photoelectronicconversion at a light-receiving element is read from the image sensor inresponse to a vertical transfer pulse and a horizontal transfer pulse. Aphotographing condition such as focus is adjusted on the basis of theimage signal output from the image sensor. Specifically, a highfrequency luminance component of the image signal is integrated, and aposition of a focus lens is adjusted so that an integrated value becomesa maximum value. However, in a prior art, there is a problem that sincefrequency of a clock to drive the image sensor is fixed, as thefrequency becomes high, high noise is included in the image signal.Furthermore, there is a problem that the noise gives negative effect onthe integrated value of the high frequency luminance component, andtherefore, it is impossible to precisely adjust the focus.

SUMMARY OF THE INVENTION

Therefore, it is a primary object of the present invention to provide adigital camera capable of reducing noise included in an output of animage sensor.

Another object of the present invention is to provide a digital cameracapable of precisely adjusting focus.

A digital camera according to the present invention comprises: an imagesensor for generating an image signal by photoelectronically convertingan optical image of an object; an exposing means for exposing the imagesensor in response to a timing signal every predetermined time period; areading means for reading the image signal generated by exposure of theexposing means from the image sensor at a first speed corresponding tothe predetermined time period; a processing means for performing apredetermined process on the basis of the image signal read by thereading means; an instructing means for instructing a photographing of adesired object; and a first changing means for changing a reading speedof the reading means to a second speed lower than the first speed whenreading the image signal of the desired object.

The image sensor is exposed in response to the timing signal everypredetermined time period, and the image signal generated by theexposure is read from the image sensor at the first speed correspondingto the predetermined time period. The read image signal is utilized fora predetermined process. When the desired object is instructed to bephotographed, the reading speed by the reading means is changed from thefirst speed to the lower second speed. The image signal of the desiredobject is read from the image sensor at the second speed.

The first speed is in correspondence to the above-describedpredetermined time period and faster than the second speed. That is, aperiod of the timing signal corresponding to the first speed is shorterthan around of the timing signal corresponding to the second speed.Thus, a time from an input of the photographing instruction to exposureof the desired object is made shorter than a time when the timing signalis generated every period corresponding to the second speed. As aresult, a responsive characteristic is improved. Furthermore, by readingthe image signal of the desired object at the second speed lower thanthe first speed, noise included in the image signal can be reduced.

In one example of the present invention, the processing means includesan adjusting means for adjusting a photographing condition on the basisof the image signal read at the first speed, and a recording means forrecording the image signal read at the second speed. Specifically, theimage signal is read at the first speed when adjusting the photographingcondition and whereby, the adjustment of the photographing condition iscompleted in a short time. On the other hand, the image signal read atthe second speed, i.e., the image signal of the desired object in whichnoise is reduced is recorded by a recording means.

In another example of the present invention, the processing meansincludes a generating means for generating a display image signal to bedisplayed on a display on the basis of the image signal read by thereading means. Accordingly, when the image signal is read at the firstspeed, a motion image is displayed on the display, and when the imagesignal is read at the second speed, a still image of the desired objectis displayed on the display.

In the other example of the present invention, the photographinginstruction includes a main-exposure instruction, and the exposing meansimplements the main-exposure in response to a timing signal immediatelyafter an input of the main-exposure instruction. The main-exposure issoon executed after the main-exposure instruction.

In further example of the present invention, the second speed is one-Nth(N: integer more than 2) of the first speed.

In another example of the present invention, the image signal read fromthe image sensor is subject to correlative double sampling by a samplingmeans at a third speed. It is noted that when the reading speed ischanged by the first changing means, a second changing means changes asampling speed to a fourth speed lower than the third speed.

A digital camera according to the present invention comprises: an imagesensor driven at a predetermined speed for photographing an object; adetecting means for detecting a high-frequency component of an imagesignal of the object photographed by the image sensor; an adjustingmeans for adjusting focus on the basis of the high-frequency component;a determining means for determining whether or not brightness of theobject is enough; and a reducing means for reducing a driving speed ofthe image sensor when the brightness is not enough.

When the object is photographed by the image sensor, the high-frequencycomponent of the image signal of the photographed object is detected bythe detecting means. The focus is adjusted by the adjusting means on thebasis of the detected high-frequency component. On the other hand, thedetermining means determines whether or not the brightness of the objectis enough, and if the brightness is not enough, the reducing meansreduces the driving speed of the image sensor.

High noise in the image signal causes high noise in the high-frequencybrightness component utilized in the focus adjustment, and therefore, itis impossible to precisely adjust the focus. This is the reason why thedriving speed of the image sensor is reduced when the brightness of theobject is not enough. Thus, it is possible to prevent the high-frequencycomponent from being influenced by noise, and it is possible toprecisely adjust the focus.

In one example of the present invention, an exposure related parameterin which an optimal exposure amount is obtained is calculated by acalculating means. The determining means determines the brightness bycomparing the exposure related parameter with a predetermined thresholdvalue.

The above described objects and other objects, features, aspects andadvantages of the present invention will become more apparent from thefollowing detailed description of the present invention when taken inconjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing one embodiment of the presentinvention;

FIG. 2 is an illustrative view showing a configuration of a CCD imager;

FIG. 3 is an illustrative view showing one example of an operation in anelectric shutter scheme;

FIG. 4 is a flowchart showing a configuration of a timing generator;

FIG. 5 is a flowchart showing a part of an operation of FIG. 1embodiment;

FIG. 6 is a flowchart showing another part of the operation of FIG. 1embodiment;

FIG. 7 is a flowchart showing the other part of the operation of FIG. 1embodiment;

FIG. 8 is a flowchart showing further part of the operation of FIG. 1embodiment;

FIG. 9 is a flowchart showing another part of the operation of FIG. 1embodiment;

FIG. 10 is a flowchart showing the other part of the operation of FIG. 1embodiment;

FIG. 11 is a flowchart showing further part of the operation of FIG. 1embodiment;

FIG. 12 is an illustrative view showing one part of the operation ofFIG. 1 embodiment;

FIG. 13(A) is an illustrative view showing a part of the operation ofFIG. 1 embodiment, and (B) is an illustrative view showing a part of anoperation of a prior art.

BEST MODE FOR EMBODYING THE INVENTION

Referring to FIG. 1, a digital camera 10 of this embodiment includes afocus lens 12 and an aperture unit 14. An object image (optical image ofthe object) is irradiated into a CCD imager 16 of an interline transferscheme through these members. It is noted that an effective area of theCCD imager 16 has a resolution of 640 pixels×480 lines (VGA) and a totalnumber of pixels including an optical black area is 680 pixels×533lines. Furthermore, a light-receiving surface of the CCD imager 16 iscovered with a color filter (not shown) of a primary color Bayer array,for example.

As shown in FIG. 2, the CCD imager 16 includes a plurality oflight-receiving elements 16 a corresponding to each of pixels, aplurality of vertical transfer registers 16 b for transferring in avertical direction an electric charge generated by photoelectronicconversion and accumulated in each light-receiving element 16 a, and ahorizontal register 16 c arranged at an end of the vertical transferregister 16 b for transferring in a horizontal direction the electriccharge transferred by the vertical transfer register 16 b. Theseelements are driven by timing pulses output from a timing generator 18(TG). As the timing pulses, vertical transfer pulses for reading theelectric charge from the light-receiving element 16 a to the verticaltransfer register 16 b and transferring the read electric charge in avertical direction line by line, a horizontal transfer pulse fortransferring the electric charge within the horizontal transfer register16 c pixel by pixel in a horizontal direction, and a charge sweep pulsefor sweeping the electric charge generated in the light-receivingportion 16 a during non-exposure time period, i.e., an electric chargeaccumulating period to an overflow drain (not shown) are utilized.

As shown in FIG. 3, a sweeping time period starts from a start of anoted one field time period, and an end of the sweeping time period iscontrolled. The electric charge accumulating period is changed dependingthereto, whereby a desired shutter speed (exposure time) is obtained.Such the art for controlling the exposure time by the sweeping pulse isknown as an electronic shutter function.

When a mode setting switch 58 is switched to a “camera” side, a systemcontroller 60 applies a corresponding key state signal to a CPU 34.Thereupon, the CPU 34 activates a signal processing block including theTG 18, a signal processing circuit 28 and etc., and an encode blockincluding a video encoder 48, a monitor (display) 50 and etc.

The TG 18 generates the above-described timing pulses so as to read acamera signal (raw image signal) from the CCD imager 16. The read camerasignal is subject to correlative double sampling and gain control in aCDS circuit 22 and an AGC circuit 24, respectively. The camera signalsubjected to the gain control is applied to the signal processingcircuit 28 through an A/D converter 26. The signal processing circuit 28generates a YUV signal on the basis of the applied camera signal, andthen outputs the generated YUV signal to a memory control circuit 44together with a writing request. The YUV signal is written to an SDRAM46 by the memory control circuit 44.

The YUV signal written in the SDRAM 46 is then read by the same memorycontrol circuit 44 on the basis of a reading-out request output from thevideo encoder 48. The video encoder 48 converts the read YUV signal intoa composite image signal in an NTSC format so as to apply the convertedcomposite image signal to the monitor 50. Consequently, a motion image(through image) of the object is displayed on a monitor screen in a realtime.

The Y signal out of the YUV signal generated in the signal processingcircuit 28 is also input to a luminance evaluation circuit 30 and afocus evaluation circuit 32. The Y signal is integrated every frame inthe luminance evaluation circuit 30, and whereby, one screen ofintegrated value is acquired. The integrated value is a luminanceevaluation value. On the other hand, a high-frequency component of the Ysignal is integrated every frame in the focus evaluation circuit 32. Theintegrated value thus obtained is an AF evaluation value. The luminanceevaluation value is utilized for calculation of an optimal shutter speed(optimal exposure time period) and an emission amount of a strobe 42while the AF evaluation value is utilized for a focus control.

When an operator half-presses a shutter button 64, the system controller60 outputs to the CPU 34 a key state signal indicative of a half-pressedstate. Herein, the CPU 34 first pre-exposes the CCD imager 16 andfetches the luminance evaluation value based on the camera signal thusobtained thereby. Then, the optimal exposure time period is acquired onthe basis of the fetched luminance evaluation value. Succeedingly, theCPU 34 performs focus adjustment. First, the CPU 34 serially sets thefocus lens 12 at a plurality of positions by driving the driver 36 so asto perform pre-exposure at each position for a predetermined timeperiod. Furthermore, the CPU 34 fetches from the luminance evaluationcircuit 30 the AF evaluation value of the object image pictured by eachpre-exposure and specifies a maximum AF evaluation value from among aplurality of AF evaluation values fetched. Then, the CPU 34 places thefocus lens 12 at a position corresponding to the specified maximum AFevaluation value.

When the shutter button 64 is full-pressed after a photographingcondition is thus adjusted, the CPU 34 determines whether or not theabove-described optimal exposure time period is within a settable range.If it is within the settable range, main exposure according to theoptimal exposure time period is implemented without emitting the strobe42. On the other hand, if the optimal exposure time period is out of thesettable range, the CPU 34 emits the strobe 42 by driving the driver 40for the purpose of complementing shortage of exposure and performsmain-exposure according to a predetermined exposure time period.

The camera signal generated by the main exposure is converted to the YUVsignal in the same manner as above description, and then the YUV signalis written to the SDRAM 46. The YUV signal written to the SDRAM 46 isread on the basis of the reading-out request from a JPEG codec 52 so asto be subjected to a compression process by the JPEG codec 52. Thecompressed YUV signal thus obtained is temporarily stored in the SDRAM46 by the memory control circuit 44, and then, read in response to arequest from the CPU 34. The read compressed YUV signal is recorded ontoa memory card 54 by the CPU 34.

The TG 18 is specifically constituted as shown in FIG. 4. A divider 18 adivides a system clock of 56 MHz output from an oscillator not showninto halves so as to generate a divided clock of 28 MHz. A switch SW1selects whether the system clock of 56 MHz or the divided clock of 28MHz in response to a control signal from the CPU 34 and applies aselected clock to a divider 18 b. Herein, when the CCD imager 16 isdriven at a frame rate of 15 fps, the divided clock of 28 MHz isselected by the switch SW1, and when the CCD imager 16 is driven at aframe rate of 30 fps, the system clock of 56 MHz is selected by theswitch SW1.

The divider 18 b also divides the applied clock into halves.Accordingly, when the system clock of 56 MHz is selected by the switchSW1, a divided clock of 28 MHz is output from the divider 18 b, and whenthe divided clock of 28 MHz is selected by the switch SW1, a dividedclock of 14 MHz is output from the divider 18 b. The divided clockoutput from the divider 18 b is applied to a clock terminal of an Hcounter 18 d.

The H counter 18 d is incremented in response to the input dividedclock, and a counted value (horizontal counted value) is applied to adecoder 18 f. When the horizontal counted value indicates “680”, thedecoder 18 f generates an active signal (HD pulse) so as to apply the HDpulse to a reset terminal of the H counter 18 e. Accordingly, thehorizontal counted value is circularly changed between “0” and “679”.

The HD pulse is also applied to a clock terminal of a V counter 18 e,and the V counter 18 e is incremented in response to the HD pulse. Acounted value (vertical counted value) of the V counter 18 e is appliedto a decoder 18 g, and the decoder 18 g generates an active signal (VDpulse) when the vertical counted value indicates “533”. The VD pulse isinput to a reset terminal of a V counter 18 c, and whereby, the verticalcounted value is circularly changed between “0” and “532”. When thesystem clock of 56 MHz is selected by the switch SW1, the VD pulse isoutput every 1/30 seconds, and when the divided clock of 28 MHz isselected by the switch SW1, the VD pulse is output every 1/15 seconds.

The horizontal counted value and the vertical counted value are alsoapplied to decoders 18 h to 18 j. The decoders 18 h to 18 j respectivelygenerate the above-described vertical transfer pulse, the horizontaltransfer pulse, and the charge sweep pulse on the basis of these countedvalue and a control signal from the CPU 34. When the system clock of 56MHz is selected by the switch SW1, these pulses are generated at aperiod corresponding to 30 fps, and when the divided clock of 28 MHz isselected by the switch SW1, these pulses are generated at a periodcorresponding to 15 fps.

It is noted that the HD pulse, the VD pulse, the horizontal countedvalue and the vertical counted value are also output to the CPU 34 forthe purpose of a photographing process described later.

The clock (58 MHz or 28 MHz) output from the switch SW1 and the clock(28 MHz or 14 MHz) output from the divider 18 b are also applied to aCDS drive pulse generation circuit 18 c. The CDS drive pulse generationcircuit 18 c generates a CDS drive pulse corresponding to 30 fps or 15fps on the basis of the applied two clocks. That is, when the systemclock of 56 MHz is output from the switch SW1 and the divided clock of28 MHz is output from the divider 18 b, the CDS drive pulsecorresponding to 30 fps is generated, and when the divided clock of 28MHz is output from the switch SW1 and the divided clock of 14 MHz isoutput from the divider 18 b, the CDS drive pulse corresponding to 15fps is generated. Thus, the TG 18 outputs a pulse for driving the CDScircuit 22 in addition to timing pulses for driving the CCD imager 16.

The CPU 34 processes a flowchart shown in FIG. 5 to FIG. 11 when acamera mode is selected. First, the switch SW1 is connected to aterminal S1 so as to set the frame rate of the CCD imager 16 to 15 fpsin a step S1. Then, it is determined whether or not the shutter button64 is half-pressed, and if “NO” is determined, a monitor-use AE processis performed in a step S5. The monitor-use AE process is repeatedlyexecuted as long as the shutter button 64 is not operated and whereby, athrough image of the object photographed with a proper exposure amountis displayed on the monitor 50.

When the shutter button 64 is half-pressed, “YES” is determined in astep S3, and it is determined whether or not the VD pulse is input in astep S7. Then, at a time of obtaining a determination result of input,the process proceeds to a step S9. The switch SW1 shown in FIG. 4 isconnected to a terminal S2 so as to set a frame rate of the CCD imager16 to 30 fps in the step S9. Succeedingly, the pre-exposure isimplemented in a step S11, and it is determined whether or not the VDpulse is input in a step S13. In the step S11, the pre-exposure isimplemented according to an exposure time period determined by themonitor-use AE process in the step S5, and “YES” is determined in thestep S13 when the VD pulse is output twice.

At a time “YES” is determined in the step S13, a luminance evaluationvalue based on the pre-exposure implemented before 2 frames, i.e., inthe step S11 is output from the luminance evaluation circuit 30. Theluminance evaluation value is fetched in a step S15, and an optimalexposure time period Ts is calculated on the basis of the fetchedluminance evaluation value in a following step S17. The calculatedexposure time period Ts is compared with a predetermined threshold value(i.e., ⅛ seconds) in a step S19. Herein, if a condition of Ts≦thethreshold value is satisfied, the AF process is executed in a step S31,and then, the process proceeds to a step S33, whereas if a condition ofTS>the threshold value is satisfied, a series of processes from stepsS21 to S29 is executed, and the process proceeds to the step S33.

First, it is determined whether or not the vertical counted value of theV counter 18 c becomes “520” in the step S21, and when a determinationresult of “YES” is obtained, the frame rate is changed to 15 fps in thestep S23. The frame rate is switched approximately at the same time asthe generation of the VD pulse (i.e., within optical black period), andno switching noise appears on the monitor 50. The AF process is executedin the step S25, and after completion of the AF process, it isdetermined whether or not the vertical counted value becomes “0” in thestep S27. Then, at the same time that “YES” is determined, the framerate is returned to 30 fps in the step S29. The switching is alsoimplemented approximately at the same time as the generation of the VDpulse.

It is determined whether or not the shutter button 64 is in thefull-pressed state in the step S33, and it is determined whether or notthe half-pressed state of the shutter button 64 was canceled in a stepS35. If the half-pressed state is continued, it is determined whether ornot the VD pulse is input in a step S37, and the pre-exposure accordingto the optimal exposure time period Ts is implemented in response to adetermination result of input in a step S39. On the other hand, if thehalf-pressed state is canceled, the process returns from the step S35 tothe step S1. That is, if the half-pressed state is continued, thepre-exposure is repeated in a state that a position of the focus lens 12is fixed, and a through image based on the pre-exposure is displayed onthe monitor 50.

When the shutter button 64 shifts from the half-pressed state to thefull-pressed state, “YES” is determined in the step S33, and the optimalexposure time period Ts is compared with a longest exposure time periodTmax in a step S41. Since a frame rate of the image sensor 16 is 30 fpsat this time, the longest exposure time period Tmax is 1/30 seconds.

When Ts≦Tmax is determined, it is determined whether or not the VD pulseis input in a step S43 and then, the process proceeds to a step S45 soas to implement the main-exposure according to the optimal exposure timeperiod Ts. After completion of the main-exposure, the vertical countedvalue is determined in a step S47, and when the vertical counted valueindicates “0”, the frame rate is returned to 15 fps in a step S49. Arecording process of a camera signal obtained by the main-exposure(image signal of desired object) is implemented in a step S51. That is,the camera signal based on the main-exposure is converted to a YUVsignal, the converted YUV signal is subject to JPEG compression, andthen, the compressed YUV signal thus obtained is recorded onto thememory card 54. After completion of the recording process, the processreturns to the step S3.

On the other hand, when Ts>Tmax is determined in the step S41,pre-emission and pre-exposure are performed in a step S55 afterinputting of the VD pulse is determined in a step S53. That is, thestrobe 42 is emitted with a predetermined pre-emission amount, and thepre-exposure according to the longest exposure time period Tmax isperformed on the image sensor 16. In a following step S57, it isdetermined whether or not the VD pulse is input twice, and if “YES” isdetermined, the luminance evaluation value is fetched from the luminanceevaluation circuit 30 in a step S59. The fetched luminance evaluationvalue is an evaluation value based on the pre-emission and thepre-exposure in the step S55, and the main-exposure amount is calculatedon the basis of the luminance evaluation value in a step S61.Thereafter, it is determined whether or not the VD pulse is input in astep S63, and then, the process proceeds to a step S65 so as to emit thestrobe 42 with the calculated main-exposure amount and perform themain-exposure on the image sensor 16 according to the longest exposuretime period Tmax. After completion of the main-emission and themain-exposure, the processes S47 to S51 are executed and then return tothe step S3.

A subroutine shown in FIG. 9 is processed in the step S5. First, it isdetermined whether or not the VD pulse is input in a step S71, and if adetermination result of “YES” is obtained, the luminance evaluationvalue is fetched in a step S73. The optimal exposure time period iscalculated on the basis of the fetched luminance evaluation value in astep S75. In a following step S77, a difference ΔS is obtained bysubtracting the exposure time period of the previous time (previousexposure time period) from the calculated exposure time period, andthen, the difference ΔS is compared with predetermined values “a” and“−a” in steps S79 and S83, respectively. If a condition of ΔS>a issatisfied, the predetermined value “a” is added to the previous exposuretime period in a step S81 so as to take the added value as a currentexposure time period. If a condition of ΔS<−a is satisfied, apredetermined value “a” is subtracted from the previous exposure timeperiod in a step S85 so as to take the subtracted value as the currentexposure time period. On the other hand, if “NO” is determined in theboth steps S79 and S83, the difference ΔS is added to the previousexposure time period in a step S87 so as to take the added value as thecurrent exposure time period. The pre-exposure is executed according tothe determined current exposure time period in a step S89, and aftercompletion of the pre-exposure, the process is returned to FIG. 5. Thus,the exposure time is never changed lager than a width of a predeterminedvalue “a”, and the brightness of the through image displayed on themonitor 50 is smoothly changed.

It is noted that since it takes two frames of period from executing thepre-exposure to obtaining the luminance evaluation value based thereon,the pre-exposure during first two frames of period is executed accordingto an initial value.

The AF process is executed according to a subroutine shown in FIG. 10and FIG. 11 in the step S25 or S31. First, an initial setting isexecuted in a step S91. Specifically, the focus lens 12 is placed at aninitial position by driving the driver 38, and an AF evaluation valuememory 34 a and a lens position memory 34 b are cleared.

Succeedingly, a series of processes of determination of input of the VDpulse, pre-exposure and one step movement of the focus lens 12 isexecuted in steps S93 to S97 and steps S99 to S103. The determination ofinput of the VD pulse and the pre-exposure are executed again in stepsS105 and S107, respectively and then, the AF evaluation value is fetchedfrom the focus evaluation circuit 32 in a step S109. The AF evaluationvalue fetched in this step is an evaluation value based on thepre-exposure in the step S95.

The AF evaluation value currently acquired (current AF evaluation value)is compared with the AF evaluation value (previous AF evaluation value)stored in the evaluation value memory 34 a. In a first step S111, acondition of the current AF evaluation value>previous AF evaluationvalue (=0) is satisfied, and at this time, the current AF evaluationvalue is stored in the AF evaluation value memory 34 a in a step S113and current lens position data is stored in the lens position memory 34b in a step S115, and then, the process proceeds to a step S117. It isnoted that a condition of the current AF evaluation value≦the previousAF evaluation value is satisfied, “NO” is determined in the step S111and then, the process directly proceeds to the step S117.

It is determined whether or not movement of the focus lens 12 iscompleted in the step S117. More specifically, it is determined whetheror not a movement process of the focus lens 12 is executed apredetermined times, and if it is not reached to a predetermined times,the process of steps S103 to step S117 is repeated. Thus, a maximum AFevaluation value out of the AF evaluation values fetched by the time themovement of the focus lens 12 is completed is stored in the AFevaluation value memory 34 a, and the position data of the focus lens 12at a time the maximum AF evaluation value is fetched is stored in thelens position memory 34 b.

It is noted that it takes 2 frames of period from the execution of thepre-exposure to the calculation of the AF evaluation value basedthereon, and after completion of the movement of the focus lens 12, theAF evaluation value can be acquired twice. Thus, the same process as thesteps S105 and S111 to S115 is executed in steps S119 to S127.Furthermore, it is determined whether or not a comparison process forthe two AF evaluation values is completed in a step S129. If “YES” isdetermined in the step S129, a position of the focus lens 12 is fixed ina step S131. There is a deviation of two steps between the lens positionindicated by the lens position data stored in the lens position memory34 b and the lens position in which the maximum AF evaluation value canbe obtained, so that the focus lens 12 is located at a position beforetwo steps than that indicated by the lens position data. Aftercompletion of such the focus adjustment, the process is restored to FIG.5.

In the AF process of the step S25, the pre-exposure is executedaccording to the optimal exposure time period Ts, and in the AF processof the step S31, the pre-exposure is executed for 1/15 seconds. That is,since it is when the optimal exposure time period Ts is longer than thethreshold value (=⅛ seconds) that the process in the step S31 isexecuted, the pre-exposure is executed with a longest exposure timeperiod settable so as to reserve a maximum exposure amount.

Referring to FIG. 12, when the shutter button 64 is half-pressed, theCCD imager 16 is subject to a pre-exposure at a frame rate of 30 fps(every 1/30 seconds). The camera signal generated by the pre-exposure isread from the CCD imager 16 at a speed corresponding to 30 fps. That is,the vertical transfer pulse and the horizontal transfer pulse aregenerated on the basis of the system clock of 28 MHz in which 30 fps canbe obtained, so that the camera signal is read at a speed correspondingto 30 fps. The read camera signal is subject to signal processes fordisplaying a through image on the monitor 50 and adjusting the focus.

When the shutter button 64 is shifted from the half-pressed state to thefull-pressed state, the main-exposure is executed at a next frame. Then,when the main-exposure is completed, the frame rate is changed from 30fps to 15 fps. The camera signal of the desired object generated by themain-exposure is read at a speed corresponding to 15 fps. Specifically,the vertical transfer pulse and the horizontal transfer pulse aregenerated on the basis of the divided clock of 14 MHz in which 15 fps isobtained, so that the camera signal is read at a speed corresponding to15 fps.

Thus, a frame rate at the pre-exposure (30 fps) is faster than a framerate at a time of reading the camera signal generated by main-exposure(15 fps). Accordingly, as can be understood from FIG. 13(A) and FIG.13(B), a time lag from a full-press of the shutter button 64 to a startof the next frame (frame to execute the main-exposure) is made shorterthan a case that a frame rate constantly retains 15 fps. Consequently, aresponse characteristic is improved. Furthermore, reading the camerasignal generated by the main-exposure at a speed corresponding to 15 fpsreduces noise included in the camera signal.

If the brightness of the object is not enough, a frame rate of the CCDimager 16 at a time of executing focus adjustment is changed from 30 fpsto 15 fps. Thus, a reading speed of the camera signal is reduced, andwhereby, noise included in the camera signal is also reduced. Since theAF evaluation value is obtained by integrating a high-frequencycomponent of the Y signal generated on the basis of the camera signal,high noise causes an error of the AF evaluation value and fails toprecisely adjust the focus. Since a driving speed of the CCD imager 16,when the brightness of the object is not enough, is reduced in thisembodiment, it is possible to prevent the AF evaluation value from beinginfluenced by noise and therefore, it is possible to precisely adjustthe focus.

Although a photographing process in an aperture priority mode isdescribed in this embodiment, the present invention is applicable to aphotographing process in a program AE mode or an exposure time prioritymode. It is noted that there is a need to execute brightnessdetermination in the step S19 of FIG. 6 on the basis of an EV value inthe program AE mode, and there is a need to execute the brightnessdetermination in the same step S19 on the basis of an amount of aperturein the exposure time priority mode.

Although a photographing condition such as a focus and etc. is adjustedwhen the shutter button is half-pressed and a main-exposure is executedwhen the shutter button is full-pressed in this embodiment, theadjustment of the photographing condition and the main-exposure may besuccessively executed in response to a press of the shutter buttonwithout providing a half-press operation. In this case, the press of theshutter button is equal to a photographing instruction.

Furthermore, although the camera signal generated by the main-exposureis read at a speed corresponding to 15 fps in this embodiment, thecamera signal may be read at a lower speed. It is noted that the camerasignal at a time of the main-exposure may preferably be read at a speedof one-Nth (N: integer number more than 2) at a time of thepre-exposure. Although both of the pre-exposure and the main-exposureare controlled in an electronic shutter scheme in this embodiment, themain-exposure may be controlled in a mechanical shutter scheme. A CMOStype can be utilized as an image sensor photographing the object besidesa CCD type. Furthermore, although the focus lens is moved for thepurpose of adjusting the focus in this embodiment, since the focus isdetermined depending on a relative position between the focus lens andthe image sensor, the image sensor may be moved in place of or togetherwith the focus lens.

Although the present invention has been described and illustrated indetail, it is clearly understood that the same is by way of illustrationand example only and is not to be taken by way of limitation, the spiritand scope of the present invention being limited only by the terms ofthe appended claims.

1. A digital camera comprising: an image sensor for generating an imagesignal by photoelectronically converting an optical image of an object;an exposer for exposing said image sensor in response to a timing signalevery predetermined time period; a reader for reading said image signalgenerated by exposing of said exposer from said image sensor at a firstspeed corresponding to said predetermined time period; a processor forperforming a predetermined process on the basis of said image signalread by said reader at said first speed; an instructor for issuing aphotographing instruction to photograph a desired object; and a firstchanger for changing a reading speed of said reader to a second speedlower than said first speed, wherein the photographing instructionincludes a main-exposure instruction that initiates a main exposureoperation and an image recording operation, and said first changerinitiates the changing of the reading speed of said reader to the secondspeed after the main-exposure operation is completed and prior toreading the image signal of said desired object from the image sensor,and the reading speed of said reader is maintained at the second speedwhile reading the image signal of said object from the image sensor. 2.A digital camera according to claim 1, wherein said processor includesan adjuster for adjusting a photographing condition on the basis of saidimage signal read at said first speed, and a recorder for recording saidimage signal read at said second speed.
 3. A digital camera according toclaim 1 or 2, wherein said processor includes a generator for generatinga display image signal to be displayed on a display on the basis of saidimage signal read by said reader.
 4. A digital camera according to claim1 or 2, wherein said exposer performs the main-exposure in response to atiming signal immediately after an input of said main-exposureinstruction.
 5. A digital camera according to claim 1 or 2, wherein saidsecond speed is one-Nth (N: integer more than 2) of said first speed. 6.A digital camera according to claim 1 or 2, further comprising: asampler for performing correlative double sampling on said image signalread from said image sensor at a third speed; and a second changer forchanging a sampling speed of said sampler to a fourth speed lower thansaid third speed at the same time as a change of said reading speed bysaid first changer.
 7. A digital camera, comprising: an image sensordriven at a predetermined speed for photographing an object; a detectorfor detecting a high-frequency component of an image signal of saidobject photographed by said image sensor; an adjuster for adjustingfocus on the basis of said high-frequency component; a determiner fordetermining whether or not brightness of said object is enough; and areducer for reducing a driving speed of said image sensor in response todetermining that the brightness of an object being photographed is notenough, wherein the reducer initiates reduction of driving speed of saidimage sensor prior to beginning a focus adjustment process on the basisof the high frequency component, and maintains the reduction of drivingspeed during the focus adjustment process.
 8. A digital camera accordingto claim 7, further comprising a calculator for calculating an exposurerelated parameter in which an optimal exposure amount is obtained on thebasis of said image signal, wherein said determiner determines thebrightness by comparing said exposure relating parameter with apredetermined threshold value.
 9. A digital camera, comprising: an imagesensor having an imaging surface onto which an optical image of anobject scene is irradiated; a selector for selecting one of a pluralityof clocks including a first clock having a first frequency and a secondclock having a second frequency which is lower than the first frequency;a generator for generating a timing signal at an interval correspondingto a frequency of a clock selected by said selector; an exposer forexposing said imaging surface in response to the timing signal generatedby said generator; a reader for reading from said image sensor an imagesignal generated on said imaging surface by an exposing process of saidexposer at a speed corresponding to a frequency of a clock selected bysaid selector; a first setter for setting, prior to a main exposureinstruction, said selector to a first state for selecting the firstclock; a processor for executing a predetermined process based on theimage signal read out by said reader prior to the main exposureinstruction; a second setter for setting said selector to a second statefor selecting the second clock at a timing of completion of a mainexposure process which is firstly carried out by said exposer after areception of the main exposure instruction for recording; and a recorderfor performing a recording process on the image signal read out by saidreader after the setting process of said second setter, wherein theimage signal on which the recording process is performed by saidrecorder is an image signal generated by the main exposing process, thepredetermined process includes an adjusting process to adjust aphotographing condition based on the image signal, and a creatingprocess to create a display image signal for displaying on a monitorbased on the image signal, said first setter carries out the settingprocess at a time of receiving an adjusting instruction to adjust thephotographing condition, and said selector continues to select thesecond clock from a timing of the setting process of said second setterto a timing of the next setting process of said first setter.
 10. Adigital camera according to claim 9, wherein the photographing conditionincludes a focus.
 11. A digital camera according to claim 9, wherein thephotographing condition includes an exposure amount.
 12. A digitalcamera according to claim 9, wherein a frequency of the second clock is1/N (N: integer more than 1) of a frequency of the first clock.
 13. Adigital camera according to claim 9, further comprising a sampler forperforming a correlation double sampling process on the image signalread out by said reader at a speed corresponding to a frequency of aclock selected by said selector.
 14. A digital camera comprising: animage sensor having an imaging surface onto which an optical image of anobject scene is irradiated; a selector for selecting one of a pluralityof clocks including a first clock having a first frequency and a secondclock having a second frequency which is lower than the first frequency;a generator for generating a timing signal at an interval correspondingto a frequency of a clock selected by said selector; an exposer forexposing said imaging surface in response to the timing signal generatedby said generator; a reader for reading from said image sensor an imagesignal generated on said imaging surface by an exposing process of saidexposer at a speed corresponding to a frequency of a clock selected bysaid selector; a first setter for setting said selector to a first statefor selecting the first clock at a time of determining a brightness ofthe object scene based on the image signal read out by said reader; anda second setter for setting said selector to a second state forselecting the second clock at a time of adjusting a focus based on theimage signal read out by said reader in response to a determinationresult of the brightness of the object scene being insufficient, whereinthe second setter sets said selector to the second state prior to afocus adjustment process and maintains the second state during the focusadjustment process.
 15. A digital camera according to claim 14, whereina frequency of the second clock is 1/N (N: integer more than 1) of afrequency of the first clock.